To improve your ADC SNR performance metrics, try this filter!
“This article describes a filter circuit that reduces reference output noise without compromising its accuracy or temperature coefficient, and requires only modest power dissipation and cost. Adding the output of this circuit to the reference pin of the LTC2508-32 improves the SNR performance of the 32-bit low noise ADC by up to 6.1dB over a range of downsampling factors compared to driving the ADC directly with the reference.
Getting the best SNR performance from an ADC is not just a matter of providing a low noise signal to the ADC input, it is equally important to provide a low noise reference voltage. While reference noise has no effect at zero scale, at full scale any noise on the reference will be visible in the output code. This is why, for a given ADC, the dynamic range (DR) measured at zero scale is typically several dB higher than the signal-to-noise ratio (SNR) measured at or near full scale. . Providing a low noise reference is especially important in oversampling applications where the SNR of the ADC is likely to exceed 140dB. To achieve this level of SNR, even the best low-noise references need some help reducing their noise levels.
There are several alternatives that can reduce the reference noise. Increasing the size of the bypass capacitors or using a simple low-pass RC filter on the reference output is not a good alternative. A large bypass capacitor on the reference output cannot by itself produce a sufficiently low effective cutoff frequency. The passive RC filter itself provides a low cutoff frequency, but produces an output voltage that varies with sampling frequency and temperature. Paralleling the outputs of multiple low-noise references is a valid alternative, but it is expensive and power-hungry. The reference filter presented here produces a low-noise reference voltage without appreciably compromising reference accuracy or temperature coefficient, and at only modest power consumption and cost.
The ADC used in this example is the LTC2508-32 (U1). The LTC2508-32 is a low noise, low power, 32-bit SAR ADC with a low pass digital filter with 4 pin-selectable downsampling factors (DF) ranging from 256 to 16384. A low noise, low temperature drift reference is necessary to achieve the full performance of the LTC2508-32.
The reference used in this example is the LTC6655-5 (U2). The LTC6655-5 offers high accuracy (±0.025% max), exceptionally low noise (0.67ppm RMS typ) and drift (2ppm/°C max) performance. Even with its exceptionally low noise performance, the LTC6655-5 degrades the SNR performance of the LTC2508-32.
The LTC2057 (U3) is a zero-drift op amp with 1/f noise rejection. The LTC2057 features an input bias current (IB) of less than 200pA, a maximum offset voltage of 4µV and a maximum offset voltage temperature coefficient of 0.015µV/°C. This is significantly lower than the temperature coefficient of the LTC6655-5 (2ppm/°C = 10µV/°C).
The LT6202 (U4) is a low noise, fast settling op amp with the necessary high short circuit current tolerance to drive the 47µF bypass capacitor required on the LTC2508-32 REF pin.
The circuit in Figure 1 uses R2 and C3 to form a 0.8Hz filter to filter the output of the reference (U2). Capacitor C3 should be a film capacitor. Tantalum and electrolytic capacitors have high leakage and will therefore create an offset across R2. Ceramic capacitors exhibit a microphone effect, which results in increased noise at low frequencies. The filtered output is buffered by the high impedance input of U3. The 200pA maximum IB of U3 produces a maximum voltage drop of only 2µV across R2. This combined with the LTC2057’s offset voltage yields a 6µV maximum error, which is relatively insignificant compared to the LTC6655-5’s 0.025% (1.25mV) maximum initial accuracy specification. U3 and U4 form a composite amplifier with the low offset, offset temperature coefficient and suppressed 1/f noise of the LTC2057, and the fast settling characteristics of the LT6202. The REF pin of U1 draws charge from C1, and the amount of charge drawn varies with the sampling rate and output code. U4 must replenish this charge to keep the REF pin voltage fixed. R5 is used to isolate U4 and C1 to improve stability on the REF pin. Ceramic capacitors with higher voltage and temperature ratings and larger physical sizes have lower voltage coefficients, which provide a higher effective capacitance. For this reason, C1 should be a 1210 size and 10V rated X7R type ceramic capacitor.
As shown in Table 1, the LTC2508-32 behaves almost theoretically, when the ADC inputs are tied together and the REF pin is driven directly by the LTC6655-5, every 4x increase in the downsampling factor increases the dynamic range by as much 6dB. Table 1 also shows that when the ADC is driven to near full scale, the SNR is as much as 7.8dB less than the DR (with the LTC6655-5 directly driving the ADC REF pin). This is due to the noise of the reference. Using the circuit shown in Figure 1 to drive the REF pin of the LTC2508-32 can achieve up to 6.1dB of SNR improvement, as shown in Table 1.
Chopper-stabilized op amps such as the LTC2057 often exhibit tones at the chopping frequency and its odd harmonics. The LTC2057 employs circuitry to suppress these artifacts well below the offset voltage. This circuit works in combination with the ADC’s own filter to remove any visible tones from the op amp’s chopping frequency, as shown in the noise floor plot in Figure 2. The graph presented in Figure 2 is an average of 5 data captures, designed to smooth the noise floor to reveal even the smallest traces of any spurious tones.
This article describes a filter circuit that reduces reference output noise without compromising its accuracy or temperature coefficient, and requires only modest power dissipation and cost. Adding the output of this circuit to the reference pin of the LTC2508-32 improves the SNR performance of the 32-bit low noise ADC by up to 6.1dB over a range of downsampling factors compared to driving the ADC directly with the reference.
The Links: EL640.480-A3 IRKT250-12