“In this article, we’ll discuss how SDRs can address the needs of multiple markets with a variety of performance, channel counts, and digital signal processor (DSP) processing capabilities, often with SWaP and budget constraints in mind. In fact, the use of SDR alone can reduce the overall size and weight of an RF system by 80% or more compared to traditional analog counterparts, which is ideal for a variety of applications including MRI, radar, spectrum monitoring, point-to-point link, and test and measurement.

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Authors: Kaue Morcelles, Bren

The radio frequency (RF) world changed completely with the advent of software-defined radio (SDR). These devices shift the dominant technology paradigm of the RF industry from fixed and bulky analog electronics to flexible and compact software-based signal processing, significantly increasing the range of commercial off-the-shelf (COTS) radio systems. As a result, SDRs now dominate the RF market for a variety of applications. However, each application has its own requirements, including size, weight and power (SWaP), performance and cost, so developers must carefully design the SDR to meet market demands. The main bottleneck that must be evaluated in the design flow is the trade-off between SWaP and performance: each SDR consists of many different components,

In this article, we’ll discuss how SDRs can address the needs of multiple markets with a variety of performance, channel counts, and digital signal processor (DSP) processing capabilities, often with SWaP and budget constraints in mind. In fact, the use of SDR alone can reduce the overall size and weight of an RF system by 80% or more compared to traditional analog counterparts, which is ideal for a variety of applications including MRI, radar, spectrum monitoring, point-to-point link, and test and measurement. However, key markets require further reductions in SWaP and cost, which are achieved by reducing the performance or total number of features of certain components, such as reducing tuning range, number of receive (Rx) and transmit (Tx) channels, DSP capabilities and total bandwidth.

Overview of SDR, Power Requirements, and Performance Specifications

Before discussing design tradeoffs, let’s review the basics of SDR. An SDR is essentially a transceiver with sophisticated embedded processing capabilities and a flexible/reconfigurable platform for changing radio parameters via software. Generic SDR is divided into three phases:

Radio Front End (RFE)
digital backend
Mixed-signal interface.

The RFE consists of one or more Rx and Tx channels and is capable of processing signals over a wide tuning range up to tens of gigahertz (GHz). In addition, the highest bandwidth SDR on the market provides 3 GHz of instantaneous bandwidth per channel and works with up to 8 independent Rx/Tx signal chains.

On the other hand, the digital backend is responsible for all signal processing operations, control functions, intelligence, data storage and communication protocols. This stage consists of a high-end FPGA with on-board DSP functionality, optimized for modulation, demodulation, up-conversion, down-conversion, data packing, and any required application-specific functions such as security schemes or artificial intelligence. The FPGA also communicates with the host or the network, packing the data into Ethernet packets and transmitting them at 10-400 Gbps over SFP+/qSFP+ links. Because an FPGA can completely change its internal structure, the digital backend can be easily reconfigured or upgraded on the fly to accommodate the latest radio protocols and DSP algorithms.

Finally, the mixed-signal interface consists of dedicated digital-to-analog and analog-to-digital converters (DAC/ADC). Each stage of SDR consists of a different set of components, each of which can be designed and dimensioned to implement a specific SWaP. High-end SDRs are also compatible with radio processing software such as GNU radio.

Based on the previous hardware description, there are several different SDR configurations on the market. A high-performance SDR typically requires the use of 5 boards: Rx board, Tx board, digital board, power board, and time board (see Figure 1). The Rx board is just the part of the RFE that receives the signal, terminated by the ADC. The Tx board consists of the transmission channels of the RFE, usually starting with DAC. Each Rx and Tx board can consist of multiple parallel channels in a Multiple Input/Multiple Output (MIMO) SDR. The digital board provides an interface to control, configure and send/receive data from the RFE channel, all synchronized by the time board. The power board is simply a power source that converts line power to voltage levels usable by the RFE, digital and timing boards. at last,

Figure 1: SDR board architecture. (Source: Every Vice)

The most fundamental limitation in any Electronic system is the power requirement: any application that requires a custom PCB design also requires a power budget. This is because the power scheme and its limitations are highly application dependent, so power budgets can vary widely for similar projects with different goals. For example, the power budget of a battery-operated SDR is very different from that of a grid-connected SDR. Additionally, power must be fed from the power strip to all other modules in the SDR transceiver.

Since each circuit board requires a specific stable and clean voltage level and must be immune to power supply fluctuations, voltage regulators are critical components in power distribution. These components are integrated circuits that provide a constant output voltage regardless of load or input voltage variations, and they must also be accounted for in the power budget.

However, due to the large amount of computation that must be performed, the largest source of power consumption for SDRs is the FPGA. The power consumption of an FPGA can be optimized in software by reducing the number of operations and optimizing the signal processing chain. Heavy computation consumes a lot of energy. For example, JESD204 transceivers consume a lot of power.

Another important factor is RFE: The power consumption of RFE increases with the number of features, operating bandwidth, tuning range, and number of channels. Some components require more power than others, so the power-performance tradeoff must be made for each component in the design flow.

Just like power requirements, performance requirements are also highly application-dependent and can be described in terms of radio link budget. The radio link budget equation is used to determine how to change the design to achieve a certain level of performance, which is represented by the received power strength (Equation 1). Once the link budget is calculated, the design can be checked for performance requirements such as bit error rate, signal-to-noise ratio (SNR), and linearity.

RxPower(dBm) = TxPower(dBm) + Gain(dBm) CLoss(dBm)(1)

There are several different performance requirements in the SDR area that have different implications for design and application. Here we discuss some of the most important:

Dynamic Range: Also known as Spurious Free Dynamic Range (SFDR), it defines the ratio between the fundamental harmonic strength and the highest spurious signal in the output. It is used to define the dynamic performance of the SDR. This can be seen in Figure 2a.

Phase Coherence: Quantifies the degree of phase synchronization of the SDR module. It depends on the quality of the clock board and clock distribution, as the clock signal must be properly shared by all components. This can be seen in Figure 2b.

Signal-to-Noise Ratio (SNR): It is the ratio between the signal power and the total RF noise received. It is probably one of the most important parameters of a radio system, depending on the application, and describes the quality of the electromagnetic (EM) signal received given external and internal conditions. It depends on the environmental conditions (precipitation, lightning, humidity, temperature), the electronics of the RFE (thermal noise, shot noise, flicker noise) and external EM transmitters (transmission lines, power plants, generators, telephones).

Sensitivity: The lowest signal the receiver can detect. It is closely related to SDR and SFDR.

Data Throughput: Describes the speed at which data is sent to a host or network. Especially important in MIMO and spectrum monitoring applications.

Tuning Range: The maximum frequency range that the SDR can receive and transmit. This significantly affects the applicability of the device.

RF Output Gain: The output power at the end of the Tx signal chain, which defines how much power can be transmitted.

RF Input Gain: The LNA gain at the receiver input, which greatly affects SNR and overall signal gain.

Linearity: Describes the amount of distortion (harmonics and intermodulation) introduced by the signal chain, especially from amplifiers. This can be seen in Figure 2c.

Figure 2: Performance metrics include (a) SFDR, (b) phase coherence, and (c) linearity. (Source: Every Vice)

Although there are many limitations related to power comparison in terms of performance trade-offs, simply adding SDR to a system can significantly reduce overall system complexity by integrating RF/analog and most computing functions in one system. However, the SDR itself presents some challenges. For example, the higher the tuning range, the more complex the clocking scheme is to cope with the increase in frequency. This also increases the complexity of the RFE, which in turn significantly affects the power requirements. The number of radio chains also increases power consumption, so a MIMO board will have higher power requirements than a single-channel SDR. In fact, some applications require an SDR with only transmit (or receive) functionality when receive (or transmit) functionality is not required. Power requirements also increase with RFE gain (input and output) and ADC resolution, so achieving better SNR, SFDR, linearity, and sensitivity typically comes with an increase in required power. Last but not least, the number and complexity of DSP operations in an FPGA is one of the main factors affecting power consumption. For example, in applications that require extensive Fast Fourier Transform (FFT) processing of large amounts of data, FPGAs will be significantly less efficient. This also highlights the need for a balance between FPGAs and RFEs, as the reduction in RFE performance actually increases power consumption as more processing power required by the FPGA is required. The number and complexity of DSP operations in an FPGA is one of the main factors affecting power consumption. For example, in applications that require extensive Fast Fourier Transform (FFT) processing of large amounts of data, FPGAs will be significantly less efficient. This also highlights the need for a balance between FPGAs and RFEs, as the reduction in RFE performance actually increases power consumption as more processing power required by the FPGA is required. The number and complexity of DSP operations in an FPGA is one of the main factors affecting power consumption. For example, in applications that require extensive Fast Fourier Transform (FFT) processing of large amounts of data, FPGAs will be significantly less efficient. This also highlights the need for a balance between FPGAs and RFEs, as the reduction in RFE performance actually increases power consumption as more processing power required by the FPGA is required.

Besides power, another important trade-off is size/weight versus performance. In this case, the smaller the requirements, the more problems with the board. For example, mixed-signal boards can be severely affected by crosstalk, ground interference, general EMI effects, and parasitic impedances. Noise performance degrades if noise from digital circuits reaches the analog signal path. Additionally, as IC size decreases and there is not enough room for large heat sinks, heat dissipation becomes an issue. An efficient way to do this is to use differential signaling and proper grounding. Additionally, modular SDRs, such as those from Per Vices, can be adapted to any application by removing/adding feature boards depending on the application, providing a more compact solution using the same equipment.

Applications and their respective requirements

When discussing SWaP limitations, satellite deployment is always the most problematic application. Airborne SDRs must be very compact and lightweight to reduce payload, especially in nanosatellite missions. Therefore, careful consideration must be given when designing the board to ensure acceptable heat dissipation and signal integrity in a compact space. In addition, electricity demand is determined by solar panels and on-board batteries, so energy supply can be significantly constrained. Satellites require multiple RF channels, including telemetry and control (TT&C), downlink/uplink, and navigation. However, the total number of channels must be minimized to comply with SWaP requirements. In this case, SDR can help optimize SWaP as channel parameters (frequency, modulation, usage) can be reconfigured remotely,

In ground stations, size/weight requirements are looser, but power consumption must always be considered, especially for remote applications. The most important performance parameters are channel sensitivity (defined primarily by SNR and SFDR) and tuning range. Therefore, it makes sense to use an ADC with higher resolution and sampling frequency. This is especially important in downlink signals from space, where high frequency signals (X and K bands) are severely attenuated by environmental conditions. High-end ADCs significantly increase power consumption, which combined with higher data throughput and fast signal processing results in inherently larger SWaP requirements, which are usually not an issue for ground stations where performance and cost are paramount.

In complex radar systems, SDR can greatly reduce SWaP requirements by replacing large and bulky legacy analog systems (Figure 3). SDR can implement waveform generation, timing processing, RFE and the complete signal processing chain in a single solution, reducing the overall size and complexity of the radar. In addition, critical radar applications can significantly benefit from the low noise figure and excellent phase coherence and stability of MIMO SDR to achieve high performance levels in a compact form factor.

Figure 3: Radar receiver using (a) traditional analog RF solutions and (b) SDR-based RF systems. (Source: Every Vice)

Another application worth mentioning is spectrum monitoring. In these applications, high data throughput is a mandatory norm, as large amounts of data must be received and sent to the host in real-time. For example, when monitoring a 1 GHz block of spectrum at a time, high performance equipment is required. High-end COTS SDRs, such as the Cyan model from Per Vices, transmit data over a 4×40/100Gbps Ethernet link, which meets spectrum monitoring requirements at the expense of increased power requirements due to the amount of FPGA packaging required. In addition, fast FFT processing is required, which greatly increases the power budget. Consumption also increases with the use of very sensitive linear amplifiers, ensuring a flat and wide detection bandwidth with high detection capability. Therefore, designing an effective spectrum monitoring solution with limited SWaP requirements is very difficult, but in many high-performance spectrum monitoring applications, this is not a problem.

in conclusion

SDR dominates the RF industry in every aspect of the market. The paradigm shift from hardware to software ensures better flexibility, higher levels of reconfigurability, and reduced SWaP requirements. However, some critical applications still require SDRs with optimized SWaP properties. At the design level, two main tradeoffs must be evaluated for each application: performance versus power consumption and performance versus size/weight. In the first aspect, high-end components with high performance require a lot of power, so SWaP can be significantly improved by reducing the number of functions or the performance level of the correct components. In the second case, the size reduction required for critical applications often degrades the overall performance of the SDR, which can be compensated by reducing the number of features. In general, an increase in performance leads to an increase in the SWaP budget, but proper optimization can optimize SWaP without reducing overall performance. In this case, a modular SDR is highly desirable as it provides a COTS solution that can be customized by the application engineer and thus optimized for specific tasks.

Kaue Morcelles is an electrical engineer specializing in electronic design and instrumentation. Learning and writing about cutting edge technology is one of his passions.

Brendon McHugh is a technical writer and field applications engineer. He holds degrees in theoretical and mathematical physics from the University of Toronto.