From the perspective of five development trends, how to choose power management chips in the future

From the perspective of five development trends, how to choose power management chips in the future

[Introduction]As an indispensable part of Electronic systems, power modules are the most common and one of the parts that test the skills of hardware engineers. A power module is a subsystem that converts, distributes, controls and monitors electrical energy in an electronic system. The power consumption, performance, cost and volume of the entire electronic system are directly related to the design of the power module. Modern large-scale electronic systems are developing in the direction of high integration, high speed, high gain and high reliability. Small interference on the power supply will affect the performance of electronic equipment, which requires the design of power modules with low noise and strong anti-ripple capability; In portable devices, there are more and more battery power supply situations, which puts forward high requirements for battery life, which usually corresponds to the extreme requirements of high efficiency, high reliability and low quiescent current of its power modules.

In short, the power module design is the basis for the performance of the electronic system. Only after the power module design of the system is done well, can we have the opportunity to pursue performance and realize all the functions of the system stably. The most important thing in the power module design is how to choose the appropriate chip and technical solution. Usually, the input and output voltage differences are determined according to the conditions of each branch in the power module, and then according to the application requirements, under the constraints of efficiency indicators, heat dissipation constraints, noise requirements, system complexity and cost, the selection can be made. The most suitable power chip, and then according to the selected power chip to achieve the corresponding power conversion and distribution functions.

According to application scenarios, power modules can be divided into AC-to-DC (AC-DC) conversion power modules and DC-to-DC (DC-DC) conversion power modules, where AC-DC power modules are usually used for devices that directly use mains power, while The DC-DC power module can only connect to the DC power supply, and then divide or boost the voltage based on the DC power input to supply the required voltage and current for each module of the system.

According to the working principle, power chips can be divided into linear power chips and switching power chips. The linear power supply is also known as the Low Drop Out Regulator (LDO) chip. Its principle is to adjust the output voltage through the voltage drop of the transistor. Compared with power chips, LDOs usually have the characteristics of small size, low noise, and convenient use.

The switching power supply chip works in the pulse width modulation (PWM) mode, which can realize the buck-boost output, and has high efficiency and low power consumption. However, due to the PWM mode, it will generate electromagnetic interference (EMI), so the noise is usually higher The corresponding LDO should be larger.

According to the realization method, the switching power supply can be divided into two categories, namely the inductive DC-DC power supply chip and the DC-DC converter based on the switched capacitor (ie the charge pump DC-DC chip). The charge pump DC-DC chip uses capacitors as switches and energy storage components. Compared with the inductive DC-DC power chip, it has the advantages of high efficiency, small size, low quiescent current, wide output voltage adjustment range, low Vmin, low noise and The advantages of low EMI, and the fact that the capacitor is easier to integrate than the Inductor, so the charge pump power chip can achieve a higher level of integration. In low-power applications, charge pump DC-DC switching power supply chips have great advantages, but charge pump power supply chips are not suitable for high-voltage and high-power scenarios. Therefore, in high-power applications, inductive DC-DC power supply chips are also in a dominant position.

In complex systems with large chips such as high-performance processors and large FPGAs, switching power supplies and LDOs are usually used in combination because the current consumption can reach several amperes to tens of amperes. The analog circuits that are susceptible to interference in complex systems are usually powered by LDO chips; and the digital part has high requirements for efficiency because of the large current, and the digital circuit itself has stronger anti-interference, so it is more suitable for switching power supply to supply power. The combination of switching power supply, LDO and various protection devices and passive components builds a power distribution system of complex systems.

In a word, LDO and switching power supply are the core of power modules in all electronic devices. The development of electronic systems also puts forward higher requirements for power chips. R&D personnel are constantly trying to update the manufacturing process, packaging technology and circuit topology to achieve more extreme performance. Or other indicators such as volume and cost. Let’s take a look at how to choose a suitable power chip from the development trend of power chips.

Smaller quiescent current – for lower losses

The annual shipment of mobile phones (including smartphones and feature phones) is nearly 2 billion, and the annual shipment of notebook computers is over 100 million. With the development of Internet of Things technology, more and more battery-powered devices are connected to the network. These devices are typically The working state is short-term activation and relatively long-term dormancy, and usually requires a full year of work without replacing the battery, or even three to five years. Such applications place extremely high requirements on the power supply chip, which must have extremely low quiescent current to maintain power efficiency at light load or no load, meet the equipment’s requirements for long battery life, and meet heavy load conditions. It is not easy to do a good job of the system’s requirements for power supply capacity.

Mouser Electronics sells the LT3009 from the manufacturer Analog Devices (ADI), which is an LDO chip that can satisfy both microamp (uA) quiescent operating current and 20 milliampere (mA) large drive capability. Specifically, the LT3009 has a no-load quiescent current of 3uA and can provide a 20mA output current at a 280mV dropout (input/output) with an input voltage range of 1.6V to 20V and an output voltage range of 0.6V to 19.5V. In addition, the LT3009 only needs a 1uF capacitor to ensure the stability and instantaneous response of the output power supply. It integrates protection functions such as current limiting, temperature limiting, reverse battery connection protection and reverse current protection, which can effectively ensure the power consumption of portable devices. Safety.

From the perspective of five development trends, how to choose power management chips in the future

Figure 1: LT3009 Voltage Drop vs Quiescent Current

(Image source: ADI)

Overall, the LT3009 is very suitable for application scenarios that require both ultra-low standby power consumption and medium-intensity drive capability. In addition to common handheld devices, it can also be used in applications such as gas meters, water meters, and access control. The LT3009 is especially good at power saving, with the ground pin never exceeding 5% of the output current when the load is increased, and the quiescent current below 1uA at shutdown.

From the perspective of five development trends, how to choose power management chips in the future

Figure 2: LT3009 Typical Application Circuit

(Image source: ADI)

lower EMI

Reducing EMI (electromagnetic interference) is mainly aimed at switching power supply chips (Switch Regulator). Since the switching power supply chip works in the state of pulse width modulation, the switching frequency is mostly several hundreds of KHz to several MHz, or even higher, so the switching power supply itself is a source of interference. If the parameter setting of the switching power supply circuit is not ideal, it will increase the electromagnetic interference emitted by it.

The main methods to reduce EMI on the device circuit board include adding shielding or filtering (the circuit can be modified), reducing the rising slope of the switching waveform, and if the chip has the spread spectrum function, the spread spectrum function can also be enabled, and the PCB traces can be modified. Overall board-level approaches to EMI optimization have costs, such as increased cost or impact on power supply performance. The best solution is that the switching power supply chip itself fully considers the electromagnetic interference problem during board-level implementation, and solves the EMI problem at the chip level, with low cost and system performance.

ADI’s Silent Switcher technology, which greatly improves the EMI performance of switching power supplies at the chip level, can effectively reduce EMI without affecting the performance of the power supply, and does not increase external components. It is a simple and efficient low-cost solution. method.

From the perspective of five development trends, how to choose power management chips in the futureFigure 3: Traditional current loop topology (left) versus Silent Switcher topology (right) (Image source: ADI)

In principle, ADI’s Silent Switcher technology will form two symmetrically distributed current loops. The magnetic fields generated by these two loops are in opposite directions, so the energy cancels each other out, so that the module electrical loop has no net magnetic field to the outside. Therefore, Silent Switcher technology does not need to reduce the switching speed of transistors, and solves the mutual exclusion problem between EMI and efficiency.

From the perspective of five development trends, how to choose power management chips in the future

Figure 4: Schematic diagram of Silent Switcher electromagnetic field

(Image source: ADI)

In addition, the Silent Switcher technology adopts the copper pillar flip-chip packaging process, which can greatly reduce the parasitic impedance of the chip pins, so it can not only reduce EMI, but also improve the efficiency of the switching power supply.

From the perspective of five development trends, how to choose power management chips in the future

Figure 5: Conventional package (left) versus copper pillar flip-chip package (right)

(Image source: ADI)

Today, the Silent Switcher has developed to the second generation. For example, the LT8650S adopts the second-generation Silent Switcher technology. Compared with the first-generation Silent Switcher, two external matching capacitors are integrated into the chip, which reduces the number of external components, and at the same time The circuit area can be reduced, EMI can be reduced, and the adaptability to the PCB can be improved. Hardware engineers have a higher degree of freedom when designing circuits using the LT8650S.

From the perspective of five development trends, how to choose power management chips in the future

Figure 6: Silent Switcher 1 requires external loop capacitors (left)

Silent Switcher 2 integrates loop capacitance into the chip for a simpler design (right) (Image source: ADI)

From the measured results, the waveforms of the LT8614 using the first-generation Silent Switcher technology and the traditional LDO LT8610 under the same conditions are improved by about 20dB. The LT8650, which integrates the second-generation Silent Switcher technology, has better EMI performance.

From the perspective of five development trends, how to choose power management chips in the future

Figure 7: Test results for improved EMI characteristics of the first-generation Silent Switcher

(Image source: ADI)

Lower noise, higher accuracy

In addition to EMI, in applications such as medical electronics, precision instruments and equipment, high-precision power supplies and communication infrastructure, the noise and power supply ripple rejection ratio (PSRR) requirements of the power chip itself are also very high, because in these applications, there are usually easy Sensitive circuit modules, such as ADC, DAC circuit, precision amplifier, high-frequency oscillator, clock and PLL, etc., if the power supply is not clean, the performance of these sensitive circuits will be greatly affected. Modules can only be powered by LDO chips with better noise suppression. With the changes in market applications, sensitive precision circuit technology continues to develop, and continues to promote precision LDO power chips to go further in the direction of lower noise and higher precision.

The noise of LDO comes from two parts, internal noise and external noise. Internal noise mainly includes thermal noise and 1/f noise, which are related to LDO design and semiconductor process. There are many sources of external noise, a common one is the noise of the LDO input power supply (usually powered by the output of the switching power supply chip). Since the LDO has high gain, it can ensure good line and load regulation performance, so it is able to attenuate the noise and ripple from the input power supply, which is the power supply ripple rejection ratio of the LDO, due to the limited bandwidth of the LDO, its PSRR varies with frequency increase and decrease. Noise outside the LDO bandwidth cannot be attenuated by the LDO itself and needs to be reduced by passive filters.

Mouser Electronics’ LT3042 from ADI is an LDO chip with an ultra-low noise, ultra-high PSRR architecture suitable for sensitive circuit applications. The LT3042’s RMS noise is only 0.8uV (RMS value) from 10Hz to 100kHz, the point noise at 10kHz is only 2nV/Hz, and the PSRR is 79dB at 1MHz. Figure 8 below shows the typical application circuit and PSRR parameters of the LT3042.

From the perspective of five development trends, how to choose power management chips in the future

Figure 8: Typical application circuit (left) and PSRR parameters (right) of the LT3042 (Image source: ADI)

The LT3042 provides nearly constant internal noise, PSRR, bandwidth, and load regulation over a wide output voltage range of 0 to 15V, independent of output voltage, making it ideal for use as a high-accuracy current reference that can be further cascaded Reduce noise.

better isolation

The above are all low-power applications. In high-power applications, power chips are also indispensable. However, high-power applications have additional requirements compared to low-power applications, namely isolation. The function of isolation is to cut off the direct loop between the high-current, high-voltage modules and the low-current, low-voltage modules in the electronic system, and to transmit control signals through coupling to protect operators and low-voltage circuit modules. Reduce the interference of high-voltage and high-current modules to the low-voltage circuit part.

Optocoupler isolation is a more traditional isolation method, but the optocoupler isolation scheme has many drawbacks, such as easy aging, slow speed and high power consumption. But before the advent of digital isolation, optocouplers were an excellent isolation solution. In the late 1990s, digital isolation technology began to be industrialized. Because of its huge advantages in size, speed, power consumption, ease of use and reliability that optocouplers cannot match, it was widely praised by the market when it was launched.

Among them, ADI is one of the leading manufacturers of digital isolation technology. With its iCoupler digital isolation chip and uModule BGA digital isolation technology, it has shipped more than 3 billion isolation channels. The ADUM6421A sold by Mouser Electronics is a DC/DC switching power supply chip that integrates four iCoupler on-off keying (OOK) digital isolation channels and iCoupler chip-level isoPower transformer technology. Using ADI’s technology, it can support 500mW isolated power supply. Small and medium-sized integrated, reinforced isolated signal and power solutions.

The ADUM6421A has a common-mode transient immunity (CMTI) of 100kV/µs, meets reinforced isolation requirements, and is EMI optimized to meet CISPR 32/EN550 32 Class B emission limits when fully loaded on a 2-layer PCB.


Miniaturization is one of the main directions of the current development of power module technology. Miniaturization can reduce the occupied PCB area, reduce the weight of the device, and facilitate the integration of more functions in the device. The miniaturization of power chips or modules is of great significance to hardware engineers. But miniaturization means high power density, that is, the same volume provides more power output, which requires the power chip to have higher conversion efficiency and better heat dissipation performance.

The R&D personnel meet the demand for power miniaturization by applying technologies in four directions. First, a better semiconductor process is used to reduce the heat emitted by the chip itself; second, innovative circuit topology and structure are used to reduce the requirements for external passive devices, so that small-sized passive devices can also meet the system requirements; third Third, innovative packaging technology to enhance the heat dissipation capability of the power chip; finally, to reduce parasitic parameters and chip size through heterogeneous integration.

ADI has outstanding performance in these directions. A typical case is the improvement of the low-voltage and high-current FPGA chip power supply scheme. In 2010, ADI needed 12 pieces of LTM4601 for an FPGA that needed 100A of current; in 2012, 4 pieces of LTM4620 were connected in parallel to output 100A of current; the LTM4630 launched in 2014 only needed 3 pieces of parallel connection to output 100A of current; The LTM4650 launched in 2016 only needs 2 pieces, which can meet the power supply of 100-amp current. But this is not the point. Today, the LTM4700 that ADI has launched has achieved a single-chip power supply of 100A.

The evolution history of LTM series is particularly obvious in the evolution of packaging technology, from ordinary plastic packaging, to adding metal heat dissipation substrates, to the development of its own component packaging (Component on Package, CoP for short). CoP is a three-dimensional packaging technology. This technology places the external inductor of the high-power power supply chip on the top of the chip through packaging technology, and exposes it to the airflow as a heat sink, which does not occupy the PCB area and improves the heat dissipation performance. , so that the power density can be increased.


Electronic devices are changing with each passing day, promoting the continuous development of power supply technology. The common requirements of electronic devices for safety, energy saving, portability and ease of use, and performance are fed back to the power supply chip, which requires chip developers to develop higher efficiency, lower power consumption, and more intelligent In order to achieve the goals of higher power density, longer battery life, lower EMI interference, better power and signal integrity, and safety under high voltage, it promotes the continuous innovation of power chip developers. In turn, the continuous innovation of power chip technology has also given more incentives and resources to electronic equipment R&D personnel, and has given engineers more choices in power supply design, so that these new technologies can be applied to the extreme.

Source: Mouser Electronics

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