Design of Undersampling Receiver System Based on High Performance ADC and RF Devices

Design of Undersampling Receiver System Based on High Performance ADC and RF Devices

A cellular base station (BTS: base transceiver station) usually consists of several different hardware modules, one of which is the transceiver (TRx) module that performs both RF receive (Rx) and transmit (Tx) functions.

1. System structure of undersampling receiver

A cellular base station (BTS: base transceiver station) usually consists of several different hardware modules, one of which is the transceiver (TRx) module that performs RF receive (Rx) and transmit (Tx) functions. In older analog AMPS and TACS BTS In today’s range, analog technology has been replaced by CDMA and WCDMA, and Europe GSM was adopted 10 years ago. In CDMA, multiple callers can use the same RF frequency, so that a single transceiver must process the signals of multiple callers simultaneously. There are various designs for CDMA and GSM. BTS manufacturers have also been working on ways to reduce cost and power consumption. Optimizing single-carrier solutions or developing multi-carrier receivers is an effective solution. Figure 1 shows an undersampling receiver commonly used in BTS equipment. structure diagram.

Design of Undersampling Receiver System Based on High Performance ADC and RF Devices

In Figure 1, Maxim’s 2GHz MAX9993 and 900MHz MAX9982 mixers provide the gain and linearity required for many designs with very low coupled noise, eliminating the need for lossy passive mixing The MAX2027 and MAX2055 work at the receiver’s second IF stage, respectively, and the two devices can reach +40dBm OIP3 over the entire gain adjustment range. The data converter in Figure 1 uses the MAX1418 (15 12-bit, 65Msps) and the MAX1211 (12-bit, 65Msps). In fact, other sample rate data converter devices from Maxim can meet most design requirements. If the second downconverter in Figure 1 is omitted (in the dashed line ), then the circuit shown in Figure 1 becomes a single-channel downconverter structure.

Design of Undersampling Receiver System Based on High Performance ADC and RF Devices

2、High performance device recommendation

2.1 Low noise ADC device MAX1418

The undersampling receiver architecture shown in Figure 1 places stringent requirements on the noise and distortion of the ADC. In the receiver, lower-level wanted signals are digitized alone or are accompanied by unwanted, large-amplitude signals that require additional attention , so in order to make the receiver work normally, the effective noise figure of the ADC should be calculated according to the extreme cases of these two signals (that is, the useful signal is the smallest and the unwanted signal reaches the value). For small analog input signals, the noise floor of the ADC The dominant thermal noise and quantization noise in the ADC determine the noise figure (NF) of the ADC.

MAX1418 family of products to fINPUT

In fact, the MAX1418 can also work with 14-bit interface devices with a slight loss of SNR and no impact on SFDR.

When the front-end gain of the ADC is 36dB, the single-tone blocking level exceeding -30dBm at the antenna end will exceed the input range of the ADC. According to the CDMA2000 cellular base station standard, the allowable blocking level at the antenna end is -30dBm, and the front-end gain at this time will exceed the input range of the ADC. It is necessary to reduce 6dB, so, within the margin allowed by the standard specification? The blocker signal allowed to be added to the ADC may be larger. Assuming that there is a 2dB margin, reducing the front-end gain by 6dB will change the blocker level at the antenna end. is -26dBm, and makes the allowable input signal of the ADC to be +4dBm. That is, when a single-tone blocker occurs, the total interference (noise + distortion) allowed by the cellular standard will be degraded by 3dB relative to the reference sensitivity, and this How to allocate 3dB between noise and distortion is a matter for designers to consider.

2.2 MAX1211 converter with downconversion structure

If sufficient SNR and SFDR indicators can be obtained at the higher IF stage, then the undersampling circuit can be used in the downconversion structure. Maxim’s MAX1211 type, 12-bit, 65Msps converter is designed with this structure, and its Pin compatible with upcoming 80Msps and 95Msps converters, this family of devices can directly sample input IF signals with frequencies up to 400MHz, in addition, it also has other advanced features, such as the clock input can be differential or single In addition, the MAX1211 is also designed with a data valid indicator (to simplify clock and data timing), and uses a small 40-pin QFN (6 x 6 x 0.8mm) package, two’s complement and gray code digital output formats.

Compared with the double-conversion structure, the converter has obvious advantages. Since the second-stage down-conversion mixer, the second-stage IF gain circuit and the second-stage LO synthesizer are omitted, the number of components and board space can be reduced About 10%, and the cost will also be greatly reduced.

Design of Undersampling Receiver System Based on High Performance ADC and RF Devices

2.3 IF amplifier MAX2027 and MAX2055

MAXIM also provides digitally controlled gain, high-performance IF amplifiers with increments of 1dB per stage. Among them, the MAX2027 digitally controlled gain amplifier, DVGA, adopts single-ended input/single-ended output, and can work in the frequency range of 50MHz to 400MHz. The noise figure is only 5dB. The MAX2055 is a single-ended input/differential output DVGA that can drive high-performance ADCs in the frequency range of 30MHz to 300MHz. A step-up transformer can be used between the differential output of the MAX2055 and the differential input of the ADC to Differential drive is provided, which facilitates balance between the output signals. The two DVGAs typically operate at a 5V offset and can achieve an OIP3 of +40dBm over the full range of gain settings.

2.4 High Linearity Mixers MAX9993 and MAX9982

In the receiving circuit, the mixer is often subjected to a large input signal with strict performance requirements. Ideally, the amplitude and phase of the output signal are proportional to the amplitude and phase of the input signal, and this ratio is proportional to the LO Signal independent. Therefore, the amplitude response of the mixer is linear with the RF input and independent of the LO input signal.

However, the nonlinearity of the mixer also produces some undesired mixing signals, called spurious responses, which are responses in the IF band caused by spurious signals arriving at the mixer’s RF port. Useless The spurious signal of the frequency will interfere with the operation of the useful RF signal, and the IF frequency of the mixer can be given by:

fIF = ±mfRF ± nfLO

Here, fIF, fRF and fLO are the signal frequencies of the respective ports, respectively, and m and n are the harmonic orders after mixing the fRF and fLO signals.

MAXIM’s integrated (or active) balanced mixers MAX9993 and MAX9982 have received much attention due to their performance superior to passive mixing schemes. When m or n is even? Balanced mixers can suppress certain spurious Responses. An ideal double-balanced mixer suppresses all responses where m or n (or both) are even. In a double-balanced mixer, the IF, RF, and LO ports are isolated from each other. The design is reasonable Baluns allow the mixers to overlap in the IF, RF, and LO bands. Features of the MAX9993 and MAX9982 include: low noise figure, built-in LO buffer, low LO drive, LO switch allowing two LO inputs, extreme Good LO noise characteristics, etc. In addition, there are RF baluns at the RF and LO ports.

Since these MAXIM mixers have embedded LO buffers with excellent LO noise performance, the LO power supply requirements are reduced. Often LO noise mixed with higher level input blocking signals reduces receiver sensitivity, while The MAX9993 and MAX9982 contain low-noise LO buffers to mitigate the effects on receiver sensitivity in the presence of blockers. For example, assuming that the sideband noise of the VCO input signal is -145dBc/Hz, the LO noise characteristic of the MAX9993 is typically -164dBc/Hz, so the composite sideband noise is reduced by only 0.05dBc/Hz to -144.95dBc/Hz. Using this method, the user only needs to provide a lower level LO signal to the mixer and can ensure The mixing characteristics of the receiver are not degraded by the performance of the built-in LO buffer in the MAX9993.

In addition, there is a tricky 2nd-order spurious response, also known as the half-IF (1/2IF) spurious response. For low-side injection, the mixer order is: m=2,n=-2; while For high-side injection, the mixer order is: m = -2, n = 2. For low-side injection, the input frequency that causes the half-IF spurious response is fIF/2 lower than the desired RF frequency, as shown in Figure 2. The exact location of the wanted fRF?fLO?fIF and unwanted fHalf-IF frequencies. In practice, the desired RF frequency is a mix of 1909MHz with the LO frequency of 1740MHz, and the resulting IF frequency is 169MHz. Although, the RF and IF of CDMA The carrier bandwidth is 1.24MHz, but is represented here as a single-frequency signal with a frequency centered on the carrier frequency. In this example, an unwanted signal with a frequency of 1824.5MHz results in a 169MHz half-IF spurious component. Due to:

2fHalf-IF – 2fLO=fIF

Therefore, it can be obtained: 2×1824.5MHz-2×1740MHz=169MHz

In general, the total amount of rejection (also known as the 2×2 spurious response) can be predicted from the mixer’s second intercept point, IIP2, and Figure 3 shows the 2×2 IMR or spurious value for the MAX1993. The signal level of is the mixer input level calculated with the input IP2 (IIP2) performance. The specific calculation formula is as follows:




Since the typical spurious response 2RF-2LO provided by the MAX9982 900MHz active filter of MAXIM Company is 65dBc, the calculation method of its IIP2 is as follows:




3. Conclusion

When the receiver gain requirements are not high, MAXIM’s 15-bit ADC chip MAX1418 has excellent noise performance, so it can withstand a large blocking level or interference level with the smallest AGC. The MAX1211 ADC series products are suitable for variable frequency receiving structures. IF input frequencies can be up to 400MHz. In addition, the MAX9993 and MAX9982 mixers provide the required linearity, combined with low noise figure and high power gain, eliminating the need for passive filters in receiver design. MAX2027 and the MAX2055 DVGA typically have an OIP3 of about +40dBm over the entire gain-adjustable range. A receiver composed of these components can improve the performance of a low-cost solution by a class.

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